1. Field of the Invention:
The present invention relates to a driver circuit used for driving an active-matrix type liquid crystal display device in which liquid crystal is interposed between a pair of substrates.
2. Description of the Related Art:
In driving a liquid crystal display device, the response speed of the liquid crystal functioning as a display medium is considerably lower than that of a luminescent material used for a cathode-ray tube (CRT). A driver circuit of a particular type is currently used for driving the liquid crystal display device.
The driver circuit for a liquid crystal display device receives image signals sequentially, but does not apply the received image signals to respective pixels sequentially. That is, the driver circuit for a liquid crystal display device holds the image signals which have been sampled so as to correspond to the respective pixels, during one horizontal period. Then, the driver circuit for a liquid crystal display device outputs all the image signals at a time at the beginning or in the middle of the next horizontal period. The driver circuit for a liquid crystal display device continues to output the voltage of the image signals for a time period long enough to charge the respective pixel electrodes with the voltage. The time period during which the voltage continues to be output is called "one output period". In general, the length of the output period is approximately equal to the length of one horizontal period, in many cases.
A large-scale integrated circuit (LSI) called a "driver" is used for performing the driving method described above. There are two kinds of drivers, i.e., a data driver (also called a column driver or a source driver) for performing the sampling and the image signal output described above, and a scanning driver (also called a row driver or gate driver) for scanning a liquid crystal display device by every horizontal line. In the following description, a data driver will be referred to as a "driver" except in a few special instances.
FIG. 9 is a diagram showing a simplified configuration for a liquid crystal display device 100 and for a driver circuit including data drivers 101 and scanning drivers 102. S(i) indicates an output from the i-th data driver 101; G(j) indicates an output from the j-th scanning driver 102; and P(j, i) indicates a pixel formed at the crossing between the i-th column and the j-th row. The arrows under pixels P(l, i), P(l, i+1), P(j, i), P(j, N), etc. indicate that these pixels are connected with a common electrode.
FIG. 10 is a circuit diagram showing a configuration for the data driver 101 corresponding to one output on the i-th column through which a digitized image signal is supplied. The circuit which has the same configuration as that shown in FIG. 10 is provided to each of the data electrodes (also called data lines) O.sub.1 to O.sub.N of the liquid crystal display device 100. FIG. 10 shows a case where image signal data is composed of three bits.
When a sampling pulse Tsmp(i) is supplied to an image signal which has been input to the i-th data driver 101, the signal is stored in an i-th sampling memory Msmp(i). After the sampling is finished for all the circuits in the above way, an output pulse LS is supplied at an appropriate timing, whereby all the data stored in the respective sampling memories Msmp are supplied to holding memories MH at a time. In this case, the data stored in the i-th sampling memory Msmp(i) is supplied to the i-th holding memory MH(i).
The data stored in each holding memory MH is input to a decoder DEC; one of eight analog switches ASW.sub.0 to ASW.sub.7 which corresponds to the value of the data is turned ON; and one of eight gray-scale voltages V.sub.0 to V.sub.7 is output through the analog switch which has been turned ON, thereby driving a corresponding data electrode of the liquid crystal display device 100. For example, if the value of the data is decimally 2, the level of the output S2 from the decoder DEC becomes high and the analog switch ASW.sub.2 is turned ON, so that the gray-scale voltage V.sub.2 is output from the circuit.
When one of the eight gray-scale voltages V.sub.0 to V.sub.7 is output from the circuit, the level of the output from the scanning driver 102 corresponding to a scanning electrode (also called a scanning line, a gate line or a row line) of a row to be used for display is high, and all the switching elements on the row turns ON. Then, each of pixel electrodes on the row is charged with the same voltage as the voltage of each corresponding data electrode. In other words, each pixel electrode is charged with the voltage output from the corresponding data driver 101, via the switching element turned ON.
For example, when the level of the j-th output from the scanning driver 102 becomes high in FIG. 9, all the switching elements T(j, 1) to T(j, N) connected with the scanning electrode Lj are turned ON. Accordingly, the pixels P(j, 1) to P(j, N) connected with the scanning electrode Lj are charged with the corresponding outputs S(l) to S(N) from the data drivers 101, respectively.
In driving the liquid crystal display device 100, it is necessary to invert the polarity of the voltage applied to the liquid crystal at regular intervals for preventing the liquid crystal from being degraded. Such a drive method is called an alternating current (AC) drive method for a liquid crystal display device. This drive method includes inverting the polarity of the output voltage from the driver 101 into positive or negative with respect to a counter electrode. A vertical inversion drive method (or a frame inversion drive method) in which the data voltage polarity is inverted frame by frame is the easiest method for performing the AC drive.
Hereinafter, the frame inversion drive method will be described in detail. FIGS. 11 and 12 show the waveforms of the respective voltages in the frame inversion drive method in which the gray-scale voltage V.sub.0 is written into all the pixels. Hereinafter, it will be assumed that the voltage V.sub.0 is written into all the pixels, except in some special cases.
In FIGS. 11 and 12, S(i) indicates an output from the i-th data driver 101; G(j) indicates an output from the j-th scanning driver 102, as the same manner in FIG. 9. In FIGS. 11 and 12, Hsyn indicates a horizontal synchronizing signal; LS indicates an output pulse as described referring to FIG. 10; and GCK indicates a clock signal for operating the scanning driver. The output pulses LS are sequentially output in synchronization with the leading edges of the respective clock signals GCK. In the following description, P(j, i), etc. indicates the potential level of a pixel.
As shown in FIG. 11, when the output pulse LSj is supplied, a voltage corresponding to the image data which has been supplied during the horizontal period Hj is output. During the horizontal period Hj+1, the level of the output G(j) from the j-th scanning driver is high, and the pixel P(j, i) is charged via the switching element T(j, i) so as to reach the level of the output voltage +VO of the output S(i) of the i-th data driver, as indicated by the arrow A in FIG. 11. That is, the potential of the P(j, i) is varied from the potential level -V0 in the previous frame to the potential level +V0 during the period Hj+1.
When the level of the output G(j) from the j-th scanning driver 102 becomes low, the switching element T(j, i) is turned OFF. As a result, the charges are held in the pixel P(j, i) and the potential level +V0 is maintained until the beginning of the write period in the next frame, i.e., the beginning of the horizontal period Hj+1 in FIG. 12. As indicated by the arrow A' in FIG. 12, the potential level of the pixel P(j, i) is inversely varied from +V0 to -V0 during the horizontal period Hj+1.
In case of the frame inversion drive method, the level of the output voltage S(i) from the i-th data driver 101 is positive +V0 all through the periods Hj-1 to Hj+1 in the frame shown in FIG. 11. To the contrary, a negative voltage -V0 is output throughout the periods Hj-1 to Hj+1 in the next frame shown in FIG. 12. Obviously, in the case where different data are written (or displayed) on the respective rows, a positive or negative voltage having a level corresponding to the data is output. In this case, although the levels of the output voltages may change, the polarity of the output voltages does not change during one frame period or one vertical period. That is, the data driver continues to charge or discharges a data electrode (or a data line) with a positive voltage or a negative voltage except for the first output (or writing onto the first row) of one vertical period.
As compared with the case of performing a row inversion drive to be described later in which the data electrode is charged or discharged with a positive voltage or a negative voltage so that the polarity of the voltages is inverted row by row, the power consumption to perform a frame inversion drive can be considerably reduced. An advantage of performing the frame inversion drive lies in such a small power consumption.
Next, the distribution of a positive or negative polarity of pixels of the entire display device driven in the frame inversion drive method will be analyzed. Before the horizontal period Hj+1 begins, the potential of all the pixels up to the (j-1)th row has already been rewritten into a positive potential. On the other hand, in the horizontal period Hj+1, the potential level of all the pixels after the (j+1)th row is equal to the level of the potential written in the previous frame, i.e., a negative potential. The potential level of the pixel P(j, i) on the j-th row is being rewritten. Therefore, during one vertical period, there are two separate regions of pixels, i.e., a region having a positive potential and a region having a negative potential, in the screen as shown in FIGS. 13A and 13B. The boundary between the two regions moves downwards row by row in the screen every time one horizontal period has passed. If an equilibrium does not exist between the transmittance with respect to the positive polarity of pixels and the transmittance with respect to the negative polarity of pixels, a visual defect is caused.
The reasons why the equilibrium would not exist between the transmittance with respect to the positive polarity of pixels and the transmittance with respect to the negative polarity of pixels are described as follows.
FIG. 14 shows waveform charts showing the relationship among the potential level of the pixel P(l, i) on the uppermost row, the potential level of the pixel P(M, i) on the lowermost row, and the respective outputs from the driver with reference to a vertical synchronizing signal Vsyn in the frame inversion drive.
Hereinafter, the period during which the output S(i) from the i-th data driver is positive (hereinafter, such a period will be referred to as a "positive drive period") will be described. Since the similar description is applicable to a negative drive period during which the output S(i) from the i-th data driver is negative, the description on the negative drive period will be omitted herein.
First, the potential variation of the pixel P(l, i) will be described. After the pixel P(l, i) has been charged to reach a positive potential level, the driver continues to output a positive potential during a period tp(1). In other words, the potential level of the corresponding data lines is positive throughout the period. On the other hand, the potential of the pixel P(M, i) is varied in a different manner. When the pixel P(M, i) has been charged, the driver completes the positive drive period. After a period tp(M) having approximately the same length as that of a retrace interval has passed, a negative drive period begins during which the driver outputs negative potentials.
Generally, a switching element is formed of a thin-film transistor (TFT), and has a limited OFF resistance R.sub.off. Even in the period during which a switching element is on the OFF state, a very small amount of current leakage always exists between a pixel and a data line via the OFF switching element. When the potential of the data line has the same polarity as that of the pixel, the amount of such a current leakage is negligible because the potential difference between the pixel and the data line is small.
In addition, the current leakage can flow bidirectionally. For example, if the potential of the pixel is higher than that of the data line, the current flows from the pixel to the data line. On the other hand, if the potential of the pixel is lower than that of the data line, the current flows from the data line to the pixel.
However, if the potential of the data line has the opposite polarity to that of the pixel, a current leakage will flow in such a direction as causing a loss of the charges. The amount of the current leakage in case of which the potential of the data line has the opposite polarity to that of the pixel is larger than that in case of which the potential of the data line has the same polarity as that of the pixel.
It is positive charges that are lost when the polarity of the pixel is positive with respect to the common electrode. To the contrary, it is negative charges that are lost when the polarity of the pixel is negative with respect to the common electrode. In this example, the pixel P(M, i) loses a far larger amount of charges than the pixel P(l, i) does.
It is noted that the part of the broken lines of the output S(i) in FIG. 14 is not necessary. As shown in FIG. 14, it is preferable to continue to output a positive voltage during the positive drive period, and it is preferable to continue to output a negative voltage during the negative drive period.
FIG. 15 schematically shows an exemplary relationship between the potential variation of the pixel P(l, i) and that of the pixel P(M, i) with reference to the vertical synchronizing signal Vsyn. In FIG. 15, the potential levels of the pixel P(l, i) and the pixel P(M, i) and the waveform of the vertical synchronizing signal are extracted from FIG. 14.
In case of the frame inversion drive, there is a high possibility that pixels lose charges, and are different from each other depending upon the vertical positions of the pixels in the liquid crystal display device. In order to avoid a defective display resulting from such a phenomenon, it is necessary to drive the liquid crystal display device within a suitable range in a voltage-transmittance characteristic curve in which the loss of charges does not cause a change in the gray-scale tones.
The transmittance characteristics for a positive driving voltage with respect to a driving terminal of a liquid crystal display device are different from the transmittance characteristics for a negative driving voltage with respect to the driving terminal of the liquid crystal display device for various reasons. In general, such a difference is corrected by making a positive driving voltage with respect to a common electrode different from a negative driving voltage with respect to the common electrode.
For example, in case of the driver shown in FIG. 10, the aforementioned difference of transmittance characteristics is corrected by using a method proposed in Japanese Laid-Open Patent Publication No. 5-53534. In this method, the gray-scale voltages V.sub.0 to V.sub.7 with respect to the common electrode during the positive drive period are made slightly different from that during the negative drive period.
However, it is difficult to completely correct the aforementioned difference of transmittance characteristics for the following reasons: the voltage-transmittance characteristics are likely to be variable among respective liquid crystal display devices; the characteristics are varied even in one and the same liquid crystal display device depending upon the position of each pixel; and the potential variations caused by the above-described reasons during the OFF period of a switching element are different from each other depending upon the display pattern (that is, the potential variation is caused during the OFF period because of the potential difference between the pixel and the data line which are connected to the source or drain of the TFT, respectively). Therefore, some difference actually exists between the transmittance characteristics during the positive drive period and the transmittance characteristics during the negative drive period.
In case of the frame inversion drive, since one row and the row adjacent to the row have the same polarity, the transmittance characteristics for a positive drive period and a negative drive period are not equalized between adjacent rows. Such an equalization is performed only between adjacent frames. The period of the equalization becomes twice as long as the period of one frame.
In addition, since the boundary between the positive potential region and the negative potential region goes on moving as described above, not only unevenness but also various defects such as a flickering are likely to be caused in the displayed image.
Because of the above-described reasons, a row inversion drive method to be described below is generally employed for an active-matrix type liquid crystal display device performing a gray-scale tone display.
FIGS. 16 and 17 show the voltage waveforms of the respective outputs in the row inversion drive method.
The row inversion drive method includes the inverting the polarity of the data voltage row by row. That is, the driver alternately outputs a different voltage, i.e., a positive voltage and a negative voltage, in every horizontal period. As a result, the polarity of the charge applied to one pixel is always opposite to the polarity of the charge applied to the pixel adjacent to the pixel in the row direction.
Since the difference between the transmittance during the positive drive period and the transmittance during the negative drive period can be equalized even between the pixels vertically adjacent to each other, the flickering becomes less recognizable.
In addition, since the voltage polarity of a data electrode never fails to be inverted every time one horizontal period has passed during one vertical (display) period, the influence of the voltage polarity inversion to all the pixels in the liquid crystal display device is made uniform.
As a result, the charge variation becomes the same irrespective of the position of each pixel on the screen, so that unevenness is less likely to be caused in an image.
In view of these advantages, the row inversion drive method is currently used most widely for a liquid crystal display device performing a gray-scale tone display.
A driver is required to output to a liquid crystal display device positive and negative voltages with respect to a common electrode, regardless the driver performs the frame inversion drive or the row inversion drive. Conventionally, a driver is required to have an output dynamic range of at least about 10 V. This requirement causes various disadvantages to an LSI for driving a liquid crystal display device.
To have an output dynamic range of 10 V for a driver, the thickness of a wiring layer or a insulating layer of the LSI, and the space between the wires in the LSI are required to be set to be larger. This increases the size of the chip and the cost of a LSI.
In order to eliminate such disadvantages, a drive method which combines an AC drive for a common electrode with the row inversion drive is proposed. In this method, a desirable dynamic range for a driver even if operating at a voltage as low as +5 V or less can be obtained.
FIG. 18 shows the waveforms of the outputs from a driver performing the aforementioned method and the driving waveform for a common electrode. In FIG. 18, voltages V.sub.0 and V.sub.7 indicate the outputs from a 3-bit driver which successively outputs 0 and 7, respectively. The pixel voltage with respect to the common electrode is the same as those shown in FIGS. 16 and 17. As a result, the output dynamic range of the driver is substantially increased. (As to the AC drive method for a common electrode, see Hisao Okada et al., "8.4 inch color TFT liquid crystal display device and technologies for driving the same", TECHNICAL REPORT OF THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS, Vol. 92, No. 469, pp. 27 to 33.)
FIG. 19A shows a circuit in which a data line (or a data electrode) of a liquid crystal display device is regarded as a load for a driver. As shown in FIG. 19A, the data lines are represented as distributed constant circuits, each of which essentially consists of the resistance of the data line itself and a capacitance formed between each data line and the common electrode opposed to the data line. The driver has to charge and discharge the circuits shown in FIG. 19A.
As capacitance components of the data line, a capacitance formed in the portion where the data line crosses a scanning line via an insulating film also exists. However, in the following description, the capacitance between the data line and the counter electrode which is directly related to the present invention will be analyzed.
In addition, a pixel is actually connected with a data line via a switching element. However, the capacitance of the pixel itself is as small as 0.1 pF, for example, whereas the capacitance of a data line is 100 pF per line. Since the capacitance of the pixel itself is a negligible one with respect to a capacitive load of the driver, the capacitance of the pixel is omitted in FIG. 19A.
In the case of charging and discharging the distributed constant circuit shown in FIG. 19A between a positive voltage and a negative voltage, the circuit must be treated as a distributed constant circuit to strictly analyze the operation of the circuit in a transient state. However, in the case of charging and discharging such a circuit while regarding a period sufficiently longer than the transient period, the circuit may be treated as a concentrated constant circuit to analyze the amount of charge at the end of the transient state. Therefore, the circuit shown in FIG. 19A can be replaced by the circuit shown in FIG. 19B.
A resistance functions as a factor determining the time required for charging and discharging a load. However, since a total amount of charges to be charged and discharged is determined by a capacitance alone, it is only necessary to analyze an equivalent circuit consisting of capacitances alone while neglecting the resistances for analyzing the amount of the charges to be charged and discharged as shown in FIG. 19C.
Since the same number of such equivalent circuits as that of the data lines exist in a liquid crystal display device, an equivalent circuit functioning as a load for the entire display device can be regarded as a circuit shown in FIG. 19D in which the same number of circuits shown in FIG. 19C as that of the data lines are commonly connected with the common electrode.
In order to simplify the description of the concept of the present invention, it is assumed that the same gray-scale tone display is performed for all the pixels on one scanning line. Thus, the potentials of the electrodes on the data side shown in FIG. 19D become equal to each other. Accordingly,the capacitance can be represented as shown in FIG. 19E, wherein Cp refers to the capacitance.
Hereinafter, a case where a voltage V.sub.0 is written into all the pixels will be described. In case of using the drive method combined the common electrode AC drive and the row inversion drive, the two states shown in FIG. 20A and 20B are alternately repeated.
More specifically, the gray-scale voltage supply circuit continues to discharge the data electrode (or charge negative charges), until the state shown in FIG. 20A where a charge +Qp is stored on the data electrode of a capacitor Cp, is turned into the state shown in FIG. 20B where a charge of -Qp is stored on the data electrode.
The total amount of charges, which is transferred from the data electrode to the gray-scale voltage supply circuit when the state shown in FIG. 20A turned to the state shown in FIG. 20B, is 2.times.(-Qp).
The common electrode driver continues to charge the common electrode until the state shown in FIG. 20A where a charge -Qp is stored on the common electrode of the capacitor Cp, is turned into the state shown in FIG. 20B where a charge +Qp is stored on the commone electrode.
The total amount of charges, which is transferred from the common electrode to the common electrode driver when the state shown in FIG. 20A turned to the state shown in FIG. 20B, is (2.times.Qp).
In the next period, the transition of states is from the state shown in FIG. 20B to the state shown in FIG. 20A. That is, the total amount of charges transferred by the gray-scale voltage supply circuit, is (2.times.Qp), while the total amount of the charges transferred by the common electrode driver is 2.times.(-Qp).
In the case where a digital driver having a configuration shown in FIG. 10 is employed, the charges necessary for charging or discharging the data line are borne by the gray-scale voltage supply circuit.
Circuits having a configuration shown in FIG. 21 are employed as the gray-scale voltage supply circuit and the common electrode driver. When the gray-scale voltage supply circuit A.sub.0 outputting a gray-scale voltage VO transfers charges (2.times.Qp) to the data line, the transistor Tr.sub.1 is turned ON and the charges are supplied from the high-level voltage supply V.sub.High. At the same time, the transistor Tr.sub.4 is turned ON and the charges 2.times.(-Qp) are transferred from the low-level voltage supply V.sub.Low to the common electrode by the common electrode driver B. In other words, the charges (2.times.Qp) are transferred from the common electrode through the transistor Tr.sub.4 to the low-level voltage supply V.sub.Low by the common electrode driver B.
The above operation causes the transfer of charges (2.times.Qp) from the high-level voltage supply V.sub.High to the low-level voltage supply V.sub.Low, i.e., the energy corresponding to the transfer of charge is consumed. When the gray-scale voltage supply circuit A.sub.0 transfers the charges 2.times.(-Qp) to the data line, the charges are transferred between the low-level voltage supply V.sub.Low and the data line through a transistor Tr.sub.2, while the charges (2.times.Qp) are transferred between the high-level voltage supply V.sub.High and the common electrode via a transistor Tr.sub.3 on the side of the common electrode driver B. The energy corresponding to the transfer of charge is also consumed.
In addition, since the transfer of charge is repeated every time one horizontal period has passed in the row inversion drive, the power consumption necessary for the drive method, which combined the row inversion drive and the common electrode AC drive, becomes considerably increased as compared with that in the case of the frame inversion drive.
The above defect is regarded as peculiar to the drive method which combined the row inversion drive and the common electrode AC drive, and as a trade-off for obtaining a high-definition image without any flickering.